Technical interview guide

RTOS & Task Scheduling

How a real-time operating system schedules multiple tasks with timing guarantees, and the classic concurrency hazards — priority inversion, deadlock — that come with it.

Read: 60 min
Practice MCQs: 25
Interview QA: 25
Edition: v3
Editorial status: Review pending
Relevant for: Embedded Systems Engineer

Scope: CMSIS-RTOS2 current API; CMSIS-RTX5 current configuration; current FreeRTOS and Zephyr scheduling guidance reviewed 2026-09-04.

Interview QA

Treat each question like a live interview question: answer out loud first (structure, assumptions, tradeoffs), then open the model answer to spot gaps and rehearse a tighter follow-up.

Curated: 2026-10-05 · Written: 2026-10-05 · Reviewed: 2026-10-04

QA-1

Design and validate RTOS behavior for thread states.

QA-2

Design and validate RTOS behavior for preemptive scheduling.

QA-3

Design and validate RTOS behavior for cooperative tasks.

QA-4

Design and validate RTOS behavior for priority assignment.

QA-5

Design and validate RTOS behavior for periodic release.

QA-6

Design and validate RTOS behavior for response-time budget.

QA-7

Design and validate RTOS behavior for WCET.

QA-8

Design and validate RTOS behavior for utilization.

QA-9

Design and validate RTOS behavior for priority inversion.

QA-10

How do Earliest Deadline First (EDF) and Rate Monotonic Scheduling (RMS) compare in their theoretical utilization limits, runtime scheduler overhead, and behavior under transient overload?

QA-11

Design and validate RTOS behavior for mutex ownership.

QA-12

Design and validate RTOS behavior for deadlock.

QA-13

Design and validate RTOS behavior for semaphores.

QA-14

Design and validate RTOS behavior for message queues.

QA-15

Design and validate RTOS behavior for thread flags.

QA-16

Design and validate RTOS behavior for lost wakeups.

QA-17

Design and validate RTOS behavior for ISR handoff.

QA-18

Design and validate RTOS behavior for software timers.

QA-19

Design and validate RTOS behavior for tick and time.

QA-20

Design and validate RTOS behavior for stack budgets.

QA-21

How do you measure context switch latency and ISR response time using hardware instrumentation (GPIO and oscilloscope or logic analyzer) versus software trace tools, and what are the trade-offs of each?

QA-22

Design and validate RTOS behavior for watchdogs.

QA-23

Design and validate RTOS behavior for overload policy.

QA-24

Design and validate RTOS behavior for trace validation.

QA-25