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Quantum Gates & the Circuit Model

How quantum programs are expressed as circuits of unitary gates acting on qubits — the single- and multi-qubit gates every quantum algorithm is built from.

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51 min
Practice MCQs
25
Interview QA
25
Edition
v2
Editorial status
Reviewed

Scope: IBM Quantum and Qiskit current circuit/transpiler documentation; OpenQASM 3; QIR specification reviewed 2026-09-04.

Overview

Curated: · Written: · Reviewed:

A quantum circuit is an ordered, acyclic program over quantum and classical resources. Qubit wires identify logical subsystems; unitary gates transform amplitudes reversibly; measurements and resets are non-unitary instructions; classical bits carry outcomes and can drive supported control flow. Diagram order, program order, matrix multiplication order, and bit-string display conventions must be stated explicitly.

An ideal gate on a closed system is unitary: its conjugate transpose is its inverse, so it preserves inner products and total probability. The Pauli X, Y, and Z gates implement pi rotations about Bloch-sphere axes; H changes between computational and X bases; S and T add relative phase. Controlled gates act conditionally on a control subspace, not by reading a hidden classical control bit. Gate order usually does not commute, and global phase is harmless only until circuit representations are embedded in controlled constructions where relative phase can become observable.

Abstract circuits are portable intent, not executable hardware programs. Compilation must bind an exact backend target, map virtual to physical qubits, route unsupported interactions, translate to its native instruction set, optimize under a declared objective, and schedule where timing matters. Equivalent unitaries can have very different depth, two-qubit count, duration, exposure to noise, and calibration validity. Measurements, resets, delays, dynamic control, and noise are instructions or channels rather than unitary gates.

Production artifacts must preserve source circuit, parameter bindings, register and bit order, compiler and backend target versions, layout, routed circuit, calibration context, random seeds, optimization settings, and semantic equivalence evidence. Test small circuits with independent statevector or operator oracles, asymmetric inputs, inverse identities, and measurement distributions. The production invariant is circuit semantic fidelity: every rewrite preserves the intended quantum channel and classical behavior while making hardware constraints and approximation error explicit.

The gap between an abstract circuit and the circuit that runs is usually measured in two-qubit gates, and it is large enough to decide whether a result exists at all. Take a five-qubit algorithm written against all-to-all connectivity with 12 CNOTs and depth 18. Mapped onto a device whose coupling graph is a line or a heavy-hex lattice, the interactions that are not physically adjacent have to be routed, and each SWAP inserted by the router costs three CNOTs. Nine SWAPs is a routine outcome for that circuit on a line, which turns 12 two-qubit gates into 39 and depth 18 into roughly 46. At a two-qubit error rate of 0.7 percent, the surviving probability moves from about 0.919 for the abstract circuit to about 0.760 for the routed one — a third of the signal lost to layout rather than to the algorithm. This is why layout is a first-class result rather than a compiler detail: choosing an initial mapping that places the algorithm's heaviest interaction pair on a physically coupled edge often removes more error than any gate-level optimization applied afterwards, and reporting a transpiled two-qubit count alongside the abstract one is the minimum honest description of a circuit's cost.

Global phase is unobservable exactly until the circuit is used as a subroutine, and this is where a rewrite that looks safe stops being safe. A compiler is free to emit any unitary equal to the target up to global phase, so a synthesized block implementing -U instead of U passes every equivalence check on its own: measurement statistics are identical in every basis. Place that block under a control and the phase becomes relative between the control-zero and control-one branches, so controlled-(-U) differs from controlled-U by a Z on the control qubit and the interference pattern of the enclosing algorithm changes. Phase estimation, amplitude amplification and any construction that reflects about a prepared state are all built from controlled blocks, which is why they are the places this bug is found. Two disciplines contain it: record the global phase explicitly on any circuit object that may be controlled later, and test blocks in the controlled form they will actually be used in rather than standalone. The general equivalence check that catches it is cheap for small blocks — compare the full unitary, not the measurement distribution, and compare it including phase when the block is destined for a controlled construction. Timing has the same character: a delay, a reset and a mid-circuit measurement are instructions with duration and non-unitary effect, so a scheduler that treats them as free reorders the circuit into one whose qubits sit idle through a different amount of decoherence than the author intended.

Verifying a rewrite needs a method chosen for the circuit's size, because the obvious method runs out at about a dozen qubits. Comparing full unitaries costs 4^n complex entries, which is 4.3 billion at 16 qubits and therefore a check for blocks rather than for programs. Above that, three cheaper oracles do most of the work. Compose the circuit with the inverse of its rewritten form and assert that the result returns a set of random input states to themselves, which tests semantic equality without ever materializing either unitary. Run the Clifford-only portion through a stabilizer simulator, which scales polynomially and catches the routing and translation errors that dominate compiler bugs. And sample the output distribution on inputs chosen to be asymmetric — a register initialized to a single excited qubit, or angles like 0.3 and 1.1 radians rather than multiples of pi over 2 — because symmetric fixtures pass under transposition, reversal and relabelling errors alike. Record the transpiled circuit itself, not merely the source and the compiler settings: an optimization level or a router seed that changes between releases produces different physical gates from identical source, and a result whose executed circuit was not retained cannot be re-examined after the fact.